3rd EUROGRAPHICS workshop on graphics hardware,

3rd EUROGRAPHICS workshop on graphics hardware,

121 Calls for Papers 1st European Test Conference 1 2 - 1 4 April 1989, Palais des Congres, Paris, France The European Test Conference will provide ...

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121

Calls for Papers 1st European Test Conference 1 2 - 1 4 April 1989, Palais des Congres, Paris, France

The European Test Conference will provide a high-quality forum for the discussion of technical developments in electronic product testing, covering all types of product from integrated circuits through to systems. Papers are invited on: - Component, board & system testing - test development - test systems - design for testability - new test technologies Deadline for 500 words summary or 10 page 2-column paper: 1 August 1988. For more information, one if referred to Colin Maunder British Telecom Research Labs Martlesham Heath Ipswich IP5 7RE, U K

3rd E U R O G R A P H I C S workshop on Graphics Hardware, 1 1 - 1 2 September, 1988 Nice, France

Graphics hardware designers today have lots of different options for system design as offered by ASIC design tools and powerful general purpose modules. On the one hand, silicon compilers offer the short turn-around time of ASIC design and allow for an increased circuit complexity. On the other hand, general purpose hardware offers economically state-of-the-art technologies and can be used to obtain "cheap" parallel systems. The aim of the workshop is to bring together leading workers in the filed of graphics hardware design, to present their work and to discuss alternative design options. Contributions are sought in the following areas: - Architectures & interaction - Architectures & algorithmic aspects North-Holland INTEGRATION, the VLSI journal 6 (1988) 121-124 0167-9260/88/$3.50 © 1988, Elsevier Science Pubfishers B.V. (North-Holland)

122

Calls for Papers

- VLSI design strategy - Innovative custom hardware - Innovative use of general purpose hardware Deadline for abstracts upto 6 pages: 20 May 1988. Further information can be obtained from Drs. A.A.M. Kuijk Department Interactive Systems Centre for Mathematics and Computer Science Kruislaan 413 1098 SJ Amsterdam, The Netherlands

1988 Bipolar Circuits and Technology Meeting 12-13 September 1988, Hyatt Regency Hotel, Minneapolis, MN, USA The Bipolar Circuits and Technology Meeting provides a forum for technical communication focused on the needs and interests of the bipolar community. Areas of interest include, but are not restricted to - Design (Analog, Digital, mixed analog/digital, novel design concepts and methods, DACs & ADCs, Amplifiers, Filters, Sensors) - Semicustom (Gate arrays, Cell libraries, Master chips, Design systems and software) - Device physics, modeling and simulation (Improved BJT models, Scaling and device limits, Reliability, Electrostatic discharge phenomena, Hot-electron phenomena, Measurement techniques) - B i p o l a r structures and processes (Novel processes, mixed bipolar/FET processes, III-V BJTs, heterojunction emitters, discrete BJTs, Packaging, integration of power and small-signal devices) - Bipolar CAD tools (software for placement, routing, cell generation etc.) Deadline for 250-1000 word summary: 11 April 1988. Further information can be obtained from Dr. Martha Russell, MEIS Center University of Minnesota 227 Lind Hall 207 Church St. SE Minneapolis, MN 55455, U.S.A.

IEEE International Conference on Computer-Aided Design November 7-10, 1988 Santa Clara, CA, USA The International Conference on Computer-Aided Design is oriented towards Electrical Engineering CAD professionals, concentrating on CAD for Electronic