A new dielectric isolation method using porous silicon K A Z U O IMAI Solid-St. Electron. 24, 159 (1981). A new dielectric isolation technology is proposed. In the new structure, single crystalline Si islands are separated from the silicon substrate by oxidised porous silicon. It is based on the following characteristics of the porous silicon oxide formation: (1) p-type Si is more easily changed to porous silicon than n-type Si; (2) porous silicon is formed along the anodic reaction current flow line; (3) the change in volume of porous silicon after oxidation is relatively small; (4) thick porous silicon films (10g.m) can be obtained easily. In this method, a p-type isolated layer is obtained by proton implantation used for an n-type layer formation. Lateral p-n junctions fabricated in such isolated silicon layers show lower leakage current than those reported in SOS technology.
Production and Processing
Innovations which reduce costs and turn-around time of integrated circuit production for small electronic engineering companies K. F. POOLE, D. L. KNEE and I. CLARK Microlelectron. J. 12(1) 33 (1981). An approach is given which enables small companies to enter into the design and prototype production of integrated circuits to meet their specific requirements, without the major financial and quality control commitments normally associated with integrated circuit production. An uncommitted integrated circuit is used as the basic vehicle of a microelectronics facility thus reducing costs and speeding up process time without compromising quality. The use of polyester-backed film and the recycling of slices are cost-saving measures which are possible on an uncommitted chip as it is specifically designed as a low-packing density, highly-versatile chip. Prototype circuits are made routinely, costing less than U.S.$50 and with a turn-around time of less than ~ve days between completion of the design and availability of a packaged integrated circuit for testing. :Jnlform aluminum deposits on large non-planar ind planar polyimide substrates by physical vapour leposition 3ERALD J. HALE "olid-St. Technol. 141 (February 1981). k physical vapour deposition process with an electron ~am gun vapour source was developed to deposit 10- to 2-p.m thick pure aluminum films with better than 2% ~ickness uniformity (standard deviation/average thickess) over a surface area of greater than 2000cm2. A recision shaped shadow mask is inserted between the abstrate and vapour source during deposition to proide a uniform deposition rate over the entire surface of lese substrates. The shadow mask is generated with the id of a computer-reduced plot obtained from beta~ckscatter thickness data that were measured on the :posit from a previous deposition run. With this ethod, thickness uniformities of 9.7 and 24.7% :quired for the initial nonplanar and planar deposits ere improved to 1.07 and 1.80%, respectively. Further aprovement is expected on the planar substrate deposit !th additional iterations to optimise the mask con~ration.
Safety in chemical vapour deposition M. L. HAMMOND Solid-St. Technol. 104 (December 1980). Safety is an essential part of semiconductor CVD. Key areas of CVD safety are identified and recommendations for action are given for each area. CVD technology can be handled in a safe manner provided the users understand the hazards involved and take appropriate action. Epitaxial layer blocks unwanted charge in MOS RAMs G. R. MOHAN RAO, L. S. WHITE, JR and RICHARD N. GOSSEN Electronics p. 103 (30 June 1981). Lightly doped cpitaxial layer permits the use of a heavily doped substrate that sweeps away error-causing superfluous minority carriers. Individual wafer metallisation utilising load-locked, close-coupled conical magnetron sputtering VANCE E. HOFFMAN and HELEN M. CHANG Solid-St. Technol. 105 (February 1981). Aluminum and aluminum alloy metallisation of individual wafers is accomplished on a cassette to cassette basis. The wafer after metallisation is returned to the very same cassette position as before metallisation. Along with the newly designed high-rate conical magnetron sputtering source which deposits 12,000A/rain, the cassette to cassette wafei" eoater provides a throughput of one wafer a minute. The high-deposition rate helps to produce films that are sufficiently gas free so that large grain size metallisations can be chemically etched without evidence of over etch at grain boundaries. Such gas free metallisations permit better step coverage and are smoother (less hillocks). The new substrate heater heats a wafer to 350°C in one minute. Sustained heat during deposition is available for growing larger grained (30ix) films if desired. This sustained heating option extends the range of parameters to tailor wafer processing. Change of the electron effective mass in extremely heavily doped n-type Si obtained by ion implantation and laser annealing M. MIYAO, T. MOTOOKA, N. NATSUAKI and T. T O K U Y A M A Solid-St. Commun. 37, 605 (1981). Infrared optical properties of extremely heavily doped n-type Si, obtained by ion implantation and laser annealing, were studied. A new relation between free-carrier effective mass (m*) and carrier concentration (1019--5 X 1021cm -3) was obtained. The value of m* increases significantly with the increase of carrier concentration, when carrier concentration exceeds 1021cm-3. The result is discussed in relation to the occupation of electrons in a new valley of the conduction band. Raman spectra of Si-implanted silicon on sapphire Y. O H M U R A . T. INOUE and T. YOSHII Solid-St. Commun. 37, 583 (1981). Raman scattering from Si-implantation-amorphised and subsequently thermally recrystallised silicon on sapphire (SOS) shows that optical phonon frequencies of silicon well correlate with the recrystallisation temperature rather than the epitaxial temperature. This implies that the strain in as-epitaxial SOS has been relieved and replaced by the one which depends upon the recrytallisation temperature. 91